DFT Engineer to take care of DFT activities of SoC/IP Macros
Perform Scan Insertion, Scan compression, MBIST insertion, memory repair, Simulation, synthesis, timing analysis, lint check, clock domain crossing check, conformal low power check, and formal verification.
Work closely with design team to close IP block specification/DFT requirement.
Work closely with physical design team to ensure quality DFT implementation..
Work closely with SIM team to hand off ATPG setup and enable ATPG pattern generation, timing simulation and support silicon bring up.
Salary: Not Disclosed by Recruiter
Industry: Semiconductors / Electronics
Functional Area: IT Software - Embedded, EDA, VLSI, ASIC, Chip Design
Role Category: Programming
Role: Testing Engineer
Employment Type: Permanent Job, Full Time